1. Technical Field
The present invention disclosed herein relates to a semiconductor device, and more particularly, to a semiconductor device using a silicon-on-insulator (SOI) substrate, and a method of forming the same.
2. Description of the Related Art
SOI technology effectively isolates semiconductor devices formed on a top layer of a silicon substrate from the bulk silicon substrate, and thereby the semiconductor devices have stable electrical characteristics at a high supply voltage compared to a general junction isolation technology. A device formed on an SOI substrate requires a smaller number of processes than a device formed on a bulk silicon substrate. Also, the SOI technology reduces capacitive coupling occurring between devices formed in a semiconductor chip. In general, the SOI substrate includes a buried oxide layer between an upper SOI silicon layer on which a semiconductor device is formed, and a lower bulk silicon substrate. Since the buried oxide layer has low thermal conductivity, the efficiency of heat release is reduced, and thus the device temperature is increased during operation. As the device temperature is increased, operational characteristics of the device may be deteriorated.
A semiconductor device may include both an NMOS transistor and a PMOS transistor. The NMOS transistor includes source/drain regions formed by implanting n-type impurities, and the PMOS transistor includes source/drain regions formed by implanting p-type impurities. In the NMOS transistor, electrons work as a carrier moving through a channel region. In the PMOS transistor, holes work as a carrier moving through a channel region. Because the mobility of electrons and holes varies according to a crystal direction of single crystal silicon, it is difficult to form optimized NMOS and PMOS transistors on the same silicon substrate at the same time. The present invention addresses these and other disadvantages of the conventional art.